Group III-nitride based devices have many potential material advantages over silicon based devices for high power electronics applications. Amongst others, these include larger bandgap and breakdown field, high electron mobility in a two dimensional electron gas (2DEG), low thermal generation current, and the possibility of using the direct bandgap plus a great variety of band and polarization engineering techniques applicable in many of these structures for novel device functions. However, applications have been hampered by a lack of low cost substrates for device fabrication.
Devices are sometimes made by heteroepitaxy on suitable substrates such as silicon carbide, sapphire or silicon. Techniques for applying the layers can include molecular beam epitaxy (MBE) or metal organic chemical vapor deposition (MOCVD) and hydride vapor phase epitaxy (HVPE). High voltage devices of gallium nitride (GaN) can require thick GaN layers, such as 2-6 micron thick layers. It can be difficult to grow thick gallium nitride by heteroepitaxy. Various stress management techniques such as graded layers or superlattices and various compensation techniques such as iron (Fe) or carbon (C) doping are used to enable growth of thick layers and to enable high resistivity buffer layers.
While the total thickness of the GaN buffer layer can be important in some devices, it can also be important to achieve a sufficiently thick layer of material with low defect density. The concentrations of extended and point defects that give deep levels in the band gap as well as dopants have to be low. This can facilitate operation of the device at high voltage without the device being subject to trapping, leakage or early breakdown effects.
To accommodate a large voltage across the source/gate and the drain in a transistor, such as a heterojunction field effect transistor (HFET), or across the anode and the cathode in a diode, the spacing required between the electrodes to sustain the voltage typically has to be large—for example, a 1 kV device may need an electrode spacing of 10 microns or larger. Thus, high voltage lateral devices require large areas and need to be made on low cost substrates. Silicon substrates are typically the most cost effective substrates for formation of III-N type devices. However, due to the large lattice and thermal mismatch between silicon and gallium nitride, nucleation and stress management layers may be required. These layers, such as superlattice layers of AlxGa1−xN can have a high density of dislocations and other deep trapping centers. While this approach can produce acceptable spacer, channel and barrier layers, a high quality thick buffer layer is difficult to achieve. Because the layers below the spacer layer can have a high concentration of defect levels in the bandgap, this can cause drain voltage induced current collapse and leakage at high drain biases and can also reduce breakdown voltage of the device.